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Central Processing Unit: Cache Memory
PmPPC7448 User’s Manual 10006757-02
3-12
L2HWF: L2 Hardware Flush
0Flush disabled
1 Flush enabled
LVRAME: LVRAM enable
0 LVRAM mode disabled
1LVRAM mode enabled
LVRAMM: LVRAM mode (read-only)
000 Reserved if LVRAM mode is enabled
001 Mode 1
010 Mode 2
011 Mode 3
100 Mode 4
101 Mode 5
110 Mode 6
111 Mode 7
The L2 cache is cleared following a power-on or hard reset. Before enabling the L2 cache,
configuration parameters must be set in the L2CR and the L2 tags must be globally invali-
dated. Initialize the L2 cache during system start-up per the following sequence:
1 Power-on reset (automatically performed by the assertion of HRESET* signal).
2 Disable interrupts and dynamic power management (DPM).
3 Disable L2 cache by clearing L2CR[L2E].
4 Perform an L2 global invalidate.
5 Enable the L2 cache for normal operation by setting the L2CR[L2E] bit to 1.