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Development Mezzanine Card: Connectors
PmPPC7448 User’s Manual 10006757-02
10-4
1. When pin 75 is grounded, this notifies the PmPPC7448 that a DMC module is attached—presence detect
(PD).
3.3 V: 3.3 V is the power supply to the DMC (analog).
CPLD_TCK: PLD Test Clock is an input to DMC and part of the PLD JTAG interface.
DMC_CS*: Chip Select for DMC Flash is an input to DMC.
19 LA7 20 LA6
21 LA5 22 LA4
23 LA3 24 LA2
25 BADDR2 26 BADDR1
27 BADDR0 28 AD7
29 AD6 30 AD5
31 AD4 32 AD3
33 AD2 34 AD1
35 AD0 36 FILT_TX
37 FILT_RX 38 GND
39 CPU_VIO
(DMC JTAG)
40 3.3 V
41 3.3 V 42 MPC7448_TCK
43 GND 44
Not connected
45
Not connected 46 Not connected
47
Not connected 48 Not connected
49
Not connected 50 Not connected
51 DMC_JP1 52 DMC_BOOT_SRC
53 DMC_JP3 54 DMC_JP4
55 LED1* 56 LED2*
57 LED3* 58 LED4*
59 MPC7448_TDO 60 MPC7448_TDI
61 DEBUG_TRST* 62 MPC7448_TMS
63 DEBUG_SRESET* 64 DEBUG_HRESET*
65 MPC7448_CKSTP
_OUT
66
Not connected
67
Not connected 68 Not connected
69
Not connected 70 Not connected
71
Not connected 72 CPLD_TDI
73 CPLD_TMS 74 CPLD_TDO
75 GND/DMC_PD
11
76
Not connected
77
Not connected 78 GND
79
Not connected 80 3.3 V
Pin: Signal: Pin: Signal: