Testability
R
Intel
®
82845 MCH for SDR Datasheet 143
Chain 3 Ball Element # Signal Name Note Initial Logic Level
B25 35 SDQ6 Input 1
C25 36 SDQ38 Input 1
C27 37 SDQ3 Input 1
D27 38 SDQ35 Input 1
B27 39 SDQ36 Input 1
C26 40 RSVD Input 1
F23 41 SDQ8 Input 1
E24 42 SDQ39 Input 1
E25 43 SDQ5 Input 1
E27 44 SDQ1 Input 1
N24 45 HI_STB# Input 1
R24 46 AD_STB Input 1
AG27 47 SBA3 Output N/A
Table 27. XOR Chain 4
Chain 4 Ball Element # Signal Name Note Initial Logic Level
D26 1 SDQ4 Input 1
F25 2 SDQ37 Input 1
B28 3 SDQ2 Input 1
C28 4 SDQ3 Input 1
E28 5 SDQ33 Input 1
J24 6 SCS4# Input 1
F26 7 RSVD Input 1
H25 8 SCS9# Input 1
K25 9 RSVD Input 1
J23 10 SCS1# Input 1
F27 11 SDQ0 Input 1
K23 12 RSVD Input 1
G28 13 SDQ32 Input 1
G27 14 SWE# Input 1
M27 15 HI_8 Input 1
M24 16 HI_10 Input 1
N28 17 HI_9 Input 1
L28 18 HI_6 Input 1
M25 19 HI_5 Input 1