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6 Intel
®
82845 MCH for SDR Datasheet
5.3
AGP Interface Overview .....................................................................................112
5.3.1 AGP Target Operations.......................................................................112
5.3.2 AGP Transaction Ordering..................................................................114
5.3.3 AGP Signal Levels...............................................................................114
5.3.4 4x AGP Protocol..................................................................................114
5.3.5 Fast Writes..........................................................................................114
5.3.6 AGP FRAME# Transactions on AGP..................................................115
5.4 Power and Thermal Management ......................................................................117
5.4.1 Processor Power State Control...........................................................117
5.4.2 Sleep State Control .............................................................................118
5.5 Intel
®
MCH Clocking ...........................................................................................118
5.6 Intel
®
MCH System Reset and Power Sequencing.............................................118
6 Electrical Characteristics .................................................................................................119
6.1 Absolute Maximum Ratings ................................................................................119
6.2 Power Characteristics.........................................................................................119
6.3 Signal Groups .....................................................................................................120
6.4 DC Characteristics..............................................................................................122
7 Ballout and Package Information.....................................................................................125
7.1 Package Mechanical Information........................................................................134
8 Testability.........................................................................................................................137
8.1 XOR Test Mode Initialization ..............................................................................137
8.2 XOR Chains........................................................................................................138