Intel DBS1200V3RPS Computer Hardware User Manual


 
Thermal/Mechanical Specifications and Design Guidelines 55
Thermal Specifications
control, similar to Thermal Monitor 2 (TM2) in previous generation processors) involves
the processor reducing its operating frequency (via the core ratio multiplier) and input
voltage (via the VID signals). This combination of lower frequency and VID results in a
reduction of the processor power consumption. The second method (clock modulation,
known as Thermal Monitor 1 or TM1 in previous generation processors) reduces power
consumption by modulating (starting and stopping) the internal processor core clocks.
The processor intelligently selects the appropriate TCC method to use on a dynamic
basis. BIOS is not required to select a specific method (as with previous-generation
processors supporting TM1 or TM2). The temperature at which Adaptive Thermal
Monitor activates the Thermal Control Circuit is factory calibrated and is not user
configurable. Snooping and interrupt processing are performed in the normal manner
while the TCC is active.
When the TCC activation temperature is reached, the processor will initiate TM2 in
attempt to reduce its temperature. If TM2 is unable to reduce the processor
temperature, then TM1 will be also be activated. TM1 and TM2 will work together
(clocks will be modulated at the lowest frequency ratio) to reduce power dissipation
and temperature.
With a properly designed and characterized thermal solution, it is anticipated that the
TCC would only be activated for very short periods of time when running the most
power intensive applications. The processor performance impact due to these brief
periods of TCC activation is expected to be so minor that it would be immeasurable. An
under-designed thermal solution that is not able to prevent excessive activation of the
TCC in the anticipated ambient environment may cause a noticeable performance loss,
and in some cases may result in a T
CASE
that exceeds the specified maximum
temperature and may affect the long-term reliability of the processor. In addition, a
thermal solution that is significantly under-designed may not be capable of cooling the
processor even when the TCC is active continuously. Refer to the appropriate Thermal
Mechanical Design Guidelines for information on designing a compliant thermal
solution.
The Thermal Monitor does not require any additional hardware, software drivers, or
interrupt handling routines. The following sections provide more details on the different
TCC mechanisms used by the processor.
6.2.2.1 Frequency/VID Control
When the Digital Temperature Sensor (DTS) reaches a value of 0 (DTS temperatures
reported via PECI may not equal zero when PROCHOT# is activated, see
Section 6.2.2.5 for further details), the TCC will be activated and the PROCHOT# signal
will be asserted. This indicates the processors' temperature has met or exceeded the
factory calibrated trip temperature and it will take action to reduce the temperature.
Upon activation of the TCC, the processor will stop the core clocks, reduce the core
ratio multiplier by 1 ratio and restart the clocks. All processor activity stops during this
frequency transition which occurs within 2 us. Once the clocks have been restarted at
the new lower frequency, processor activity resumes while the voltage requested by the
VID lines is stepped down to the minimum possible for the particular frequency.
Running the processor at the lower frequency and voltage will reduce power
consumption and should allow the processor to cool off. If after 1ms the processor is
still too hot (the temperature has not dropped below the TCC activation point, DTS still
= 0 and PROCHOT is still active), then a second frequency and voltage transition will