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B-8 Sun Fire X4100 and Sun Fire X4200 Servers Service Manual • June 2006
0E Testing and initialization of different Input Devices. Also, update the Kernel Variables.
Traps the INT09h vector, so that the POST INT09h handler gets control for IRQ1.
Decompress all available language, BIOS logo, and Silent logo modules.
13 Initialize PM regs and PM PCI regs at Early-POST. Initialize multi host bridge, if system
support it. Setup ECC options before memory clearing. REDIRECTION causes corrected
data to written to RAM immediately. CHIPKILL provides 4 bit error det/corr of x4 type
memory. Enable PCI-X clock lines in the 8131.
20 Relocate all the CPUs to a unique SMBASE address. The BSP will be set to have its entry
point at A000:0. If less than 5 CPU sockets are present on a board, subsequent CPUs entry
points will be separated by 8000h bytes. If more than 4 CPU sockets are present, entry
points are separated by 200h bytes. CPU module will be responsible for the relocation of
the CPU to correct address. NOTE: APs are left in the INIT state.
24 Decompress and initialize any platform specific BIOS modules.
30 Initialize System Management Interrupt.
2A Initializes different devices through DIM.
2C Initializes different devices. Detects and initializes the video adapter installed in the
system that have optional ROMs.
2E Initializes all the output devices.
31 Allocate memory for ADM module and decompress it. Give control to ADM module for
initialization. Initialize language and font modules for ADM. Activate ADM module.
33 Initializes the silent boot module. Set the window for displaying text information.
37 Displaying sign-on message, CPU information, setup key message, and any OEM specific
information.
38 Initializes different devices through DIM.
39 Initializes DMAC-1 and DMAC-2.
3A Initialize RTC date/time.
3B Test for total memory installed in the system. Also, Check for DEL or ESC keys to limit
memory test. Display total memory in the system.
3C By this point, RAM read/write test is completed, program memory holes or handle any
adjustments needed in RAM size with respect to NB. Test if HT Module found an error in
Boot Block and CPU compatibility for MP environment.
40 Detect different devices (Parallel ports, serial ports, and coprocessor in CPU, etc.)
successfully installed in the system and update the BDA, EBDA, etc.
50 Programming the memory hole or any kind of implementation that needs an adjustment
in system RAM size if needed.
52 Updates CMOS memory size from memory found in memory test. Allocates memory for
Extended BIOS Data Area from base memory.
TABLE B-2 POST Code Checkpoints (Continued)
Post Code Description