Filter
Top Products
LSI Specification
MB86617A
Rev.1.0 Fujitsu VLSI
121
<< Flow chart after storing transmitting data into Asynchronous transmit FIFO
<Host> <Device>
Figure 11.3.2 Flow chart after storing transmitting data in Asynchronous transmit FIFO
START
Issue Asynchronous transmit (31h) instruction.
Receive Asynchronous transmit (31h) instruction.
Read Asynchronous transmit buffer.
Transmit Asynchronous packet.
Arbitration result
Acknowledge received?
Report Asynchronous packet send
(INT17) interrupt (assert XINT).
Report Acknowledge missing (INT20)
interrupt (assert XINT).
After the transfer of DATA_END,
release bus and wait Asynchronous
packet receiving.
Arbitration procedure
END
Read Asynchronous packet transmit
(INT17) interrupt.
Read Acknowledge missing (INT20)
interrupt.
Lost
Won
Yes
No
Store receive Acknowledge packet in
receive Acknowledge indication
register.