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LSI Specification
MB86617A
Rev.1.0 Fujitsu VLSI
35
7.7. TSP Transmit Information Setting Register [A]
TSP transmit information setting register [A] is the register that makes settings for transmit packet processed by bridge-Ach.
AD R/W
Bit
15
Bit
14
Bit
13
Bit
12
Bit
11
Bit
10
Bit
9
Bit
8
Bit
7
Bit
6
Bit
5
Bit
4
Bit
3
Bit
2
Bit
1
Bit
0
10h R/W
Tx
start
-A
Tx
end
-A
Tx
select
-A
set TS-ID-A
Tx
form
-A
input
DSS
size -A
EMI
select
-A
set EMI-A
27M
count
-A
port
mask-
A
Initial Value ‘0’ ‘0’ ‘0’ “00 h” ‘0’ ‘0’ ‘0’ “00 b” ‘0’ ‘0’
BIT Bit Name Action Value Function
0
Automatically clears when transmit process is started with bridge-Ach after setting
at ‘1’.
15 Tx start-A
Read/
Write
1 Starts transmit processing with bridge-Ach.
0
Automatically clears when transmit process is stopped by bridge-Ach after setting
at ‘1’.
14 Tx end-A
Read/
Write
1 Stops transmit process by bridge-Ach.
0 Outputs ‘L’ to SELTSPA output terminal.
13 Tx select-A
Read/
Write
1 Outputs ‘H’ to SELTSPA output terminal.
12 - 7 set TS-ID-A
Read/
Write
-
Set TSCH classification ID to be stored at FIFO of bridge-Ach.
(MSB: bit12, LSB: bit7)
0 Processes transmit data as MPEG2-TS.
6 Tx form-A
Read/
Write
1 Processes transmit data as DSS packet.
0 Processes transmit DSS packet as 140 byte.
5
input DSS
size-A
Read/
Write
1 Processes transmit DSS packet as 130 byte.