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LSI Specification
MB86617A
Rev.1.0 Fujitsu VLSI
90
8.8. Physical register #07, 08, 09 (read)
Physical Register#07, 08, 09 are the registers that indicate signal condition of IEEE1394 port and cable connection condition.
phy/
link-
addr
R/W
Bit
15
Bit
14
Bit
13
Bit
12
Bit
11
Bit
10
Bit
9
Bit
8
Bit
7
Bit
6
Bit
5
Bit
4
Bit
3
Bit
2
Bit
1
Bit
0
0C h R - - - - - - - - Astat-0 Bstate-0
Ch ild-
0
Connec
ted-0
- -
0E h R - - - - - - - - Astat-1 Bstate-1
Ch ild-
1
Connec
ted-1
- -
10 h R - - - - - - - - Astat-2 Bstate-2
Ch ild-
2
Connec
ted-2
- -
Initial Value ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’ ‘0’
<< Description of Each Bit
BIT Bit Name Action Value Function
15 - 8 reserved Read - Always indicate ‘0’.
7 - 6 Astat-n Read -
Indicate TPA line state of 1394 port n (MSB : 7 , LSB : 6).
00 = invalid
01 = ‘1’
10 = ‘0’
11 = ‘Z’
5 - 4 Bstat-n Read -
Indicate TPB line state of 1394 port n (MSB : 5 , LSB : 4).
00 = invalid
01 = ‘1’
10 = ‘0’
11 = ‘Z’
0 Indicates that 1394 port n is parent port.
3 Child-n Read
1 Indicates that 1394 port n is children port.
0 Indicates that cable is not connected to 1394 port n.
2 Connected-n Read
1 Indicates that cable is connected to 1394 port n.
1 - 0 reserved Read - Always indicate ‘0’