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LSI Specification
MB86617A
Rev.1.0 Fujitsu VLSI
69
7.31. Cycle-timer-monitor Indicate Register
Cycle-timer-monitor indicate register indicates value of integrated cycle-timer register.
AD R/W
Bit
15
Bit
14
Bit
13
Bit
12
Bit
11
Bit
10
Bit
9
Bit
8
Bit
7
Bit
6
Bit
5
Bit
4
Bit
3
Bit
2
Bit
1
Bit
0
5Ah R cycle-timer-monitor (hi)
5Ch R cycle-timer-monitor (lo)
Initial Value “0000 h”
BIT Bit Name Action Value Function
15 - 0
cycle-timer-m
onitor
Read -
Indicate value of built-in cycle-timer register.
(MSB: bit15, LSB: bit0)
Note) This register latches the lower word (5A h) by reading out lower word (5Ch), and releases latch by reading out upper word.
To read out this register, make sure to read out in the order of 5C h → 5A h, two as a set.