Fujitsu MB86617A Network Card User Manual


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LSI Specification
MB86617A
Rev.1.0 Fujitsu VLSI
15
IERRA O
Output pin for noticing error of receive data (on port A)
‘H’ active signal
IERRB O
Output pin for noticing error of receive data (on port B)
‘H’ active signal
DSSCLKA I
Clock input pin for DSS data (27MHz)
DSSCLKB I
Clock input pin for DSS data (27MHz)
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