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LSI Specification MB86617A
Rev.1.0 Fujitsu VLSI
ii
Contents
CHAPTER 1 OVERVIEW ............................................................................................................................................................................1
CHAPTER 2 FEATURES ..............................................................................................................................................................................2
CHAPTER 3 CHIP BLOCK .........................................................................................................................................................................3
3.1. BLOCK DIAGRAM..................................................................................................................................................................................4
<NORMAL OPERATION MODE......................................................................................................................................................................4
<ASYNCHRONOUS TRANSMIT FIFO EXTENDED MODE ......................................................................................................................5
<ASYNCHRONOUS RECEIVE FIFO EXTENDED MODE.......................................................................................................................... 6
3.2. FUNCTION OF EACH BLOCK...................................................................................................................................................................7
<PHY LAYER CONTROL CIRCUIT.............................................................................................................................................................7
<LINK LAYER CONTROL CIRCUIT........................................................................................................................................................... 7
<TSP IC INTERFACE.................................................................................................................................................................................... 7
<CP IC INTERFACE ......................................................................................................................................................................................7
<DATA BRIDGE .............................................................................................................................................................................................7
CHAPTER 4 PIN ASSIGN MENT............................................................................................................................................................... 8
4.1. P
IN
A
SSIGNMENT
..................................................................................................................................................................................... 9
4.2.CORRESPONDING TABLE OF MB86617A PIN
..................................................................................................................................... 10
4.3. OUTLINE DRAWING OF PACKAGE ........................................................................................................................................................ 11
CHAPTER 5 PIN FUNCTION................................................................................................................................................................... 12
5.1. IEEE1394 INTERFACE........................................................................................................................................................................... 13
5.2. ISOCHRONOUS INTERFACE.................................................................................................................................................................... 14
5.4. MPU INTERFACE .................................................................................................................................................................................... 16
5.5. OTHER PINS ............................................................................................................................................................................................ 17
5.6. POWER/GND PIN...................................................................................................................................................................................18
CHAPTER 6 INTERNAL REGISTER .................................................................................................................................................... 19
CHAPTER 7 INTERNAL REGISTER FUNCTION DESCRIPTION........................................................................................... 25
7.1. MODE -CONTROL REGISTER.................................................................................................................................................................. 27
7.2. FLAG & STATUS REGISTER .................................................................................................................................................................... 29