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LSI Specification
MB86617A
Rev.1.0 Fujitsu VLSI
49
7.16. Data Bridge Transmit Information Setting Register 2 [A]
Data bridge transmit information setting register 2 [A] is the register that sets CIP header range, transmit channel, and speed added to
transmit packet processed by bridge-Ach.
AD R/W
Bit
15
Bit
14
Bit
13
Bit
12
Bit
11
Bit
10
Bit
9
Bit
8
Bit
7
Bit
6
Bit
5
Bit
4
Bit
3
Bit
2
Bit
1
Bit
0
36h R/W Tx FMT-A
Tx
TSF -
A
Tx channel-A Tx speed-A -
Initial Value “00” h ‘0’ “00” h “00” b ‘0’
BIT Bit Name Action Value Function
15 - 10 Tx FMT -A
Read/
Write
-
Write in FMT range of transmit CIP header.
(MSB: bit15, LSB: bit10)
MPEG2-TS at transmit: “100000” b
DSS at transmit: “100001” b
9 Tx TSF-A
Read/
Write
- Write in TSF range of transmits CIP header.
8 - 3 Tx channel-A
Read/
Write
-
Write in channel range of transmit Isochronous packet header.
(MSB: bit8, LSB: bit 3)
2 - 1 Tx speed-A
Read/
Write
-
Write in transmit packet speed.
(MSB: bit2, LSB: bit1)
s100 at transmit: “00” b
s200 at transmit: “01” b
s400 at transmit: “10” b
Read - Always indicates ‘0’.
0 reserved
Write - Always writes in ‘0’.