Intel 8XC196NT Computer Hardware User Manual


 
A-3
SIGNAL DESCRIPTIONS
Figure A-2. 87C196CB 100-pin QFP Package
A.2 SIGNAL DESCRIPTIONS
Table A-2 defines the columns used in Table A-3, which describes the signals.
P5.7 / BUSWIDTH
P5.2 / WR# / WRL# / SLPWR#
P5.5 / BHE# / WRH#
P5.3 / RD# / SLPRD#
A20 / EPORT.4
A21 / EPORT.5
A22 / EPORT.6
V
PP
A23 / EPORT.7
P5.0 / ADV# / ALE / SLPALE
P5.1 / INST / SLPCS#
P5.6 / READY
P5.4 / SLPINT
A19 / EPORT.3
NC
V
CC
NC
V
SS1
V
SS
NC
RXCAN
TXCAN
XTAL1
XTAL2
NC
P6.7 / SD1
P6.6 / SC1
P6.5 / SD0
P6.4 / SC0
V
CC
2.TROPE / 81A
1SUBP /
1PLS
/ 1.3P / 1DA
2SUBP / 2PLS
/
2.3P / 2DA
3SUBP /
3PLS
/ 3.3P /
3
DA
4SUBP / 4PLS
/ 4
.3P / 4DA
5S
UBP
/ 5PLS
/ 5.3P /
5
DA
6SUBP / 6PLS / 6.3P / 6DA
7S
UBP
/ 7PLS
/ 7.3P
/ 7DA
V
CC
V
1SS
8S
UBP
/ 0.4P / 8DA
9SUBP
/ 1.4P / 9DA
0
1S
UBP /
2.4P /
01DA
11SUBP /
3.4P / 11DA
2
1S
UBP /
4.4P /
21
DA
3
1S
UBP /
5.4P / 31DA
4
1S
UBP /
6.
4P / 41DA
5
1S
UBP /
7.4P / 5
1
DA
0.
TROPE /
61A
1.TROPE / 71A
NC
AD0 / P3.0 / SLP0 / PBUS0
RESET#
NMI
EA#
V
SS1
NC
V
CC
NC
V
SS
NC
NC
NC
NC
P2.0 / TXD / PVER
P2.1 / RXD / PALE#
P2.2 / EXTINT / PROG#
P2.3 / BREQ#
NC
P2.4 / INTOUT# / AINC#
P2.5 / HOLD#
P2.6 / HLDA# / CPVER / ONCE#
P2.7 / CLKOUT / PACT#
V
CC
V
SS1
P0.0 / ACH0
P0.1 / ACH1
P0.2 / ACH2
P0.3 / ACH3
P0.4 / ACH4 / PMODE.0
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
xx87C196CB
View of component as
mounted on PC board
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
1.EDOMP / 5HCA / 5.0P
2.EDOMP / 6H
CA /
6.0P
3
.E
DOMP / 7HCA / 7.0P
DNG
NA
V
FE
R
V
CC
V
1SS
7APE / 7.1P
6APE / 6
.1P
5APE / 5.1P
4APE / 4.
1P
3APE / 3.1P
R
I
D2T /
2APE / 2.1P
1APE / 1.1P
KLC2T / 0APE /
0.1P
0P
M
O
C /
8APE / 0.6P
1PMOC / 9APE / 1
.6P
KLC1T / 2.6P
RID1T / 3.
6P
NELLP
1
3
23
33
4
3
53
63
73
83
93
04
14
24
3
4
44
5
4
64
74
84
94
05
001
9
9
8
9
79
6
9
5
9
4
9
3
9
2
9
1
9
0
9
9
8
88
7
8
68
5
8
4
8
3
8
2
8
1
8
A3171-02