Intel 8XC196NT Computer Hardware User Manual


 
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CONTENTS
TABLES
Table Page
1-1 Related Documents......................................................................................................1-2
2-1 Features of the 8XC196NT and 87C196CB.................................................................2-1
2-2 State Times at Various Frequencies ............................................................................2-4
2-3 Relationships Between Input Frequency, Clock Multiplier, and State Times ...............2-5
3-1 Register File Memory Addresses .................................................................................3-1
3-2 87C196CB Memory Map..............................................................................................3-2
3-3 87C196CB Peripheral SFRs.........................................................................................3-3
3-4 CAN Peripheral SFRs...................................................................................................3-4
3-5 Selecting a Window of Peripheral SFRs.......................................................................3-6
3-6 Selecting a Window of the Upper Register File............................................................3-7
3-7 Selecting a Window of Upper Register RAM................................................................3-8
3-8 Windows.......................................................................................................................3-9
3-9 WSR Settings and Direct Addresses for Windowable SFRs......................................3-11
4-1 Interrupt Sources, Vectors, and Priorities.....................................................................4-1
5-1 87C196CB Input/Output Ports......................................................................................5-1
6-1 A/D Converter Pins.......................................................................................................6-1
7-1 CAN Controller Signals.................................................................................................7-3
7-2 Control and Status Registers .......................................................................................7-3
7-3 CAN Controller Address Map.......................................................................................7-5
7-4 Message Object Structure............................................................................................7-6
7-5 Effect of Masking on Message Identifiers.....................................................................7-7
7-6 Standard Message Frame............................................................................................7-8
7-7 Extended Message Frame ...........................................................................................7-8
7-8 CAN Protocol Bit Time Segments ..............................................................................7-10
7-9 CAN Controller Bit Time Segments............................................................................7-11
7-10 Bit Timing Relationships.............................................................................................7-12
7-11 Bit Timing Requirements for Synchronization ............................................................7-17
7-12 Control Register Bit-pair Interpretation.......................................................................7-23
7-13 Cross-reference for Register Bits Shown in Flowcharts.............................................7-35
7-14 Register Values Following Reset................................................................................7-41
9-1 Modes 0 and 3 Timing Comparisons............................................................................9-1
10-1 Signature Word and Programming Voltages..............................................................10-1
10-2 Slave Programming Mode Memory Map....................................................................10-2
10-3 Auto Programming Memory Map................................................................................10-2
10-4 Serial Port Programming Mode Memory Map............................................................10-4
A-1 87C196CB Signals Arranged by Functional Categories..............................................A-1
A-2 Description of Columns of Table A-3...........................................................................A-4
A-3 Signal Descriptions......................................................................................................A-4
A-4 Definition of Status Symbols ..................................................................................... A-14
A-5 87C196CB Pin Status ............................................................................................... A-14