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DE2-70 User Manual
7
SSRAM
• 2-Mbyte standard synchronous SRAM
• Organized as 512K x 36 bits
• Accessible as memory for the Nios II processor and by the DE2-70 Control Panel
SDRAM
• Two 32-Mbyte Single Data Rate Synchronous Dynamic RAM memory chips
• Organized as 4M x 16 bits x 4 banks
• Accessible as memory for the Nios II processor and by the DE2-70 Control Panel
Flash memory
• 8-Mbyte NOR Flash memory
• Support both byte and word mode access
• Accessible as memory for the Nios II processor and by the DE2-70 Control Panel
SD card socket
• Provides SPI and 1-bit SD mode for SD Card access
• Accessible as memory for the Nios II processor with the DE2-70 SD Card Driver
Pushbutton switches
• 4 pushbutton switches
• Debounced by a Schmitt trigger circuit
• Normally high; generates one active-low pulse when the switch is pressed
Toggle switches
• 18 toggle switches for user inputs
• A switch causes logic 0 when in the DOWN (closest to the edge of the DE2-70 board)
position and logic 1 when in the UP position
Clock inputs
• 50-MHz oscillator
• 28.63-MHz oscillator
• SMA external clock input