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SNC 5100
200 Secondary POST
6-00020-02
This test writes and reads a series of diagnostic patterns to each memory
location in SDRAM. This test is identified by the repeated flash of the SCSI2
LED. This test can take several seconds to complete.
Address Test
Figure 16 Address Test
This test writes and reads address tags to memory to test for bad SDRAM
address lines. This test is identified by the flash of the SCSI3 LED. POST then
relocates itself to SDRAM and moves it’s stack from processor internal RAM
to SDRAM. Control is then transferred to the SDRAM based Secondary POST.
Secondary POST
This stage of POST attempts to locate and execute the intermediate loader, or
“bootrom”. If the operator presses the interrupt button then POST will enter
into the service menu. See the section “POST Service Menu” for details.
Identify and Execute bootrom
Figure 17 Identify and Execute