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S1C63000 CORE CPU MANUAL EPSON 95
CHAPTER 4: INSTRUCTION SET
JP %Y Indirect jump using Y reg. 1 cycle
Function: PC ← Y
Loads the content of the Y register into the PC to branch unconditionally.
Code: Mnemonic MSB LSB
JP %Y 111111111001X1FF2H, (1FF3H)
Flags: EICZ
↓ –––
Mode: Register direct
Extended addressing: Invalid
JR %A Jump to relative location A reg. 1 cycle
Function: PC ← PC + A + 1
Adds the content of the A register to the address next to this instruction, to unconditionally
branch to that address. Branch destination range is the next address of this instruction +0 to 15.
Code:
Mnemonic MSB LSB
JR %A 11111111100011FF1H
Flags: EICZ
↓ –––
Mode: Register direct
Extended addressing: Invalid