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S1C63000 CORE CPU MANUAL EPSON 141
CHAPTER 4: INSTRUCTION SET
XOR %r,[%ir] Exclusive OR location [ir reg.] and r reg. 1 cycle
Function: r ← r ∀ [ir]
Performs an exclusive OR operation of the content of the data memory addressed by the ir
register (X or Y) and the content of the r register (A or B), and stores the result in the r register.
Code:
Mnemonic MSB LSB
XOR %A,[%X] 11011111000001BE0H
XOR %A,[%Y] 11011111000101BE2H
XOR %B,[%X] 11011111001001BE4H
XOR %B,[%Y] 11011111001101BE6H
Flags: EICZ
↓ ––↕
Mode: Src: Register indirect
Dst: Register direct
Extended addressing: Valid
Extended LDB %EXT,imm8
operation: XOR %r,[%X] r ← r ∀ [00imm8] (00imm8 = 0000H + 00H to FFH)
LDB %EXT,imm8
XOR %r,[%Y] r ← r ∀ [FFimm8] (FFimm8 = FF00H + 00H to FFH)
XOR %r,[%ir]+ Exclusive OR location [ir reg.] and r reg. and increment ir reg. 1 cycle
Function: r ← r ∀ [ir], ir ← ir + 1
Performs an exclusive OR operation of the content of the data memory addressed by the ir
register (X or Y) and the content of the r register (A or B), and stores the result in the r register.
Then increments the ir register (X or Y). The flags change due to the operation result of the r
register and the increment result of the ir register does not affect the flags.
Code:
Mnemonic MSB LSB
XOR %A,[%X]+ 11011111000011BE1H
XOR %A,[%Y]+ 11011111000111BE3H
XOR %B,[%X]+ 11011111001011BE5H
XOR %B,[%Y]+ 11011111001111BE7H
Flags: EICZ
↓ ––↕
Mode: Src: Register indirect
Dst: Register direct
Extended addressing: Invalid