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S1C63000 CORE CPU MANUAL EPSON 119
CHAPTER 4: INSTRUCTION SET
RETD imm8 Return from subroutine and load imm8 into location [X] 3 cycles
Function: PC ← ([SP1*4+3]~[SP1*4]), SP1 ← SP1 +1, [X] ← i3-0, [X+1] ← i7-4, X ← X + 2
After executing the RET instruction, stores the 8-bit immediate data imm8 into the data
memory (2 words) indicated by the X register (X register specifies the low-order address of the
2 words). The X register is incremented by 2 words.
Code:
Mnemonic MSB LSB
RETD imm8 10001i7i6i5i4i3i2i1i01100H–11FFH
Flags: EICZ
↓ –––
Mode: Immediate data
Extended addressing: Invalid
RETI Return from interrupt routine 2 cycles
Function: PC ← ([SP1*4+3]~[SP1*4]), SP1 ← SP1 +1, F ← [SP2], SP2 ← SP2 +1
After executing the RET instruction, loads the 4-bit data that has been stored in the address
indicated by the stack pointer SP2 into the F register, then increments the SP2. This instruction
is used for returning from interrupt routines.
Code:
Mnemonic MSB LSB
RETI 11111111110011FF9H
Flags: EICZ
↕↕↕↕