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S1C63000 CORE CPU MANUAL EPSON 41
CHAPTER 4: INSTRUCTION SET
ADD %A,%A
%A,%B
%A,imm4
%A,[%X]
%A,[%X]+
%A,[%Y]
%A,[%Y]+
ADD %B,%A
%B,%B
%B,imm4
%B,[%X]
%B,[%X]+
%B,[%Y]
%B,[%Y]+
ADD [%X],%A
[%X],%B
[%X],imm4
[%X]+,%A
[%X]+,%B
[%X]+,imm4
ADD [%Y],%A
[%Y],%B
[%Y],imm4
[%Y]+,%A
[%Y]+,%B
[%Y]+,imm4
ADC %A,%A
%A,%B
%A,imm4
%A,[%X]
%A,[%X]+
%A,[%Y]
%A,[%Y]+
ADC %B,%A
%B,%B
%B,imm4
%B,[%X]
%B,[%X]+
%B,[%Y]
%B,[%Y]+
ADC [%X],%A
[%X],%B
[%X],imm4
[%X]+,%A
[%X]+,%B
[%X]+,imm4
ADC [%Y],%A
[%Y],%B
[%Y],imm4
[%Y]+,%A
[%Y]+,%B
[%Y]+,imm4
SUB %A,%A
%A,%B
%A,imm4
%A,[%X]
%A,[%X]+
%A,[%Y]
%A,[%Y]+
110010111000X
110010111001X
110010100i3i2i1i0
1100101100000
1100101100001
1100101100010
1100101100011
110010111010X
110010111011X
110010101i3i2i1i0
1100101100100
1100101100101
1100101100110
1100101100111
1100101101000
1100101101100
110010000i3i2i1i0
1100101101001
1100101101101
110010001i3i2i1i0
1100101101010
1100101101110
110010010i3i2i1i0
1100101101011
1100101101111
110010011i3i2i1i0
110011111000X
110011111001X
110011100i3i2i1i0
1100111100000
1100111100001
1100111100010
1100111100011
110011111010X
110011111011X
110011101i3i2i1i0
1100111100100
1100111100101
1100111100110
1100111100111
1100111101000
1100111101100
110011000i3i2i1i0
1100111101001
1100111101101
110011001i3i2i1i0
1100111101010
1100111101110
110011010i3i2i1i0
1100111101011
1100111101111
110011011i3i2i1i0
110000111000X
110000111001X
110000100i3i2i1i0
1100001100000
1100001100001
1100001100010
1100001100011
1 ↓ – ×
1 ↓ – ×
1 ↓ – ×
1 ↓ – ●
1 ↓ – ×
1 ↓ – ●
1 ↓ – ×
1 ↓ – ×
1 ↓ – ×
1 ↓ – ×
1 ↓ – ●
1 ↓ – ×
1 ↓ – ●
1 ↓ – ×
2 ↓ – ●
2 ↓ – ●
2 ↓ – ●
2 ↓ – ×
2 ↓ – ×
2 ↓ – ×
2 ↓ – ●
2 ↓ – ●
2 ↓ – ●
2 ↓ – ×
2 ↓ – ×
2 ↓ – ×
1 ↓ – ×
1 ↓ – ×
1 ↓ – ×
1 ↓ – ●
1 ↓ – ×
1 ↓ – ●
1 ↓ – ×
1 ↓ – ×
1 ↓ – ×
1 ↓ – ×
1 ↓ – ●
1 ↓ – ×
1 ↓ – ●
1 ↓ – ×
2 ↓ – ●
2 ↓ – ●
2 ↓ – ●
2 ↓ – ×
2 ↓ – ×
2 ↓ – ×
2 ↓ – ●
2 ↓ – ●
2 ↓ – ●
2 ↓ – ×
2 ↓ – ×
2 ↓ – ×
1 ↓ – ↓↑ ×
1 ↓ – ×
1 ↓ – ×
1 ↓ – ●
1 ↓ – ×
1 ↓ – ●
1 ↓ – ×
A ← A+A
A ← A+B
A ← A+imm4
A ← A+[X]
A ← A+[X], X ← X+1
A ← A+[Y]
A ← A+[Y], Y ← Y+1
B ← B+A
B ← B+B
B ← B+imm4
B ← B+[X]
B ← B+[X], X ← X+1
B ← B+[Y]
B ← B+[Y], Y ← Y+1
[X] ← [X]+A
[X] ← [X]+B
[X] ← [X]+imm4
[X] ← [X]+A, X ← X+1
[X] ← [X]+B, X ← X+1
[X] ← [X]+imm4, X ← X+1
[Y] ← [Y]+A
[Y] ← [Y]+B
[Y] ← [Y]+imm4
[Y] ← [Y]+A, Y ← Y+1
[Y] ← [Y]+B, Y ← Y+1
[Y] ← [Y]+imm4, Y ← Y+1
A ← A+A+C
A ← A+B+C
A ← A+imm4+C
A ← A+[X]+C
A ← A+[X]+C, X ← X+1
A ← A+[Y]+C
A ← A+[Y]+C, Y ← Y+1
B ← B+A+C
B ← B+B+C
B ← B+imm4+C
B ← B+[X]+C
B ← B+[X]+C, X ← X+1
B ← B+[Y]+C
B ← B+[Y]+C, Y ← Y+1
[X] ← [X]+A+C
[X] ← [X]+B+C
[X] ← [X]+imm4+C
[X] ← [X]+A+C, X ← X+1
[X] ← [X]+B+C, X ← X+1
[X] ← [X]+imm4+C, X ← X+1
[Y] ← [Y]+A+C
[Y] ← [Y]+B+C
[Y] ← [Y]+imm4+C
[Y] ← [Y]+A+C, Y ← Y+1
[Y] ← [Y]+B+C, Y ← Y+1
[Y] ← [Y]+imm4+C, Y ← Y+1
A ← A-A
A ← A-B
A ← A-imm4
A ← A-[X]
A ← A-[X], X ← X+1
A ← A-[Y]
A ← A-[Y], Y ← Y+1
68
68
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70
68
68
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72
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61
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64
135
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136
Mnemonic
Machine code
Operation Cycle Page
Flag EXT.
mode
12
EICZ
11109876543210
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ALU alithmetic operation (1/3)
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