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S1C63000 CORE CPU MANUAL EPSON 115
CHAPTER 4: INSTRUCTION SET
OR [%ir]+,%r Logical OR of r reg. and location [ir reg.] and increment ir reg. 2 cycles
Function: [ir] ← [ir] ∨ r, ir ← ir +1
Performs a logical OR operation of the content of the r register (A or B) and the content of the
data memory addressed by the ir register (X or Y), and stores the result in that address. Then
increments the ir register (X or Y). The flags change due to the operation result of the data
memory and the increment result of the ir register does not affect the flags.
Code:
Mnemonic MSB LSB
OR [%X]+,%A 11011011010011B69H
OR [%X]+,%B 11011011011011B6DH
OR [%Y]+,%A 11011011010111B6BH
OR [%Y]+,%B 11011011011111B6FH
Flags: EICZ
↓ ––↕
Mode: Src: Register direct
Dst: Register indirect
Extended addressing: Invalid
OR [%ir],imm4 Logical OR of immediate data imm4 and location [ir reg.] 2 cycles
Function: [ir] ← [ir] ∨ imm4
Performs a logical OR operation of the 4-bit immediate data imm4 and the content of the data
memory addressed by the ir register (X or Y), and stores the result in that address.
Code:
Mnemonic MSB LSB
OR [%X],imm4 110110000i3i2i1i01B00H–1B0FH
OR [%Y],imm4 110110010i3i2i1i01B20H–1B2FH
Flags: EICZ
↓ ––↕
Mode: Src: Immediate data
Dst: Register indirect
Extended addressing: Valid
Extended LDB %EXT,imm8
operation: OR [%X],imm4 [00imm8] ← [00imm8] ∨ imm4 (00imm8 = 0000H + 00H to FFH)
LDB %EXT,imm8
OR [%Y],imm4 [FFimm8] ← [FFimm8] ∨ imm4 (FFimm8 = FF00H + 00H to FFH)