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70 EPSON S1C63000 CORE CPU MANUAL
CHAPTER 4: INSTRUCTION SET
ADD %r,[%ir]+ Add location [ir reg.] to r reg. and increment ir reg. 1 cycle
Function: r ← r + [ir], ir ← ir + 1
Adds the content of the data memory addressed by the ir register (X or Y) to the r register (A or
B). Then increments the ir register (X or Y). The flags change due to the operation result of the r
register and the increment result of the ir register does not affect the flags.
Code:
Mnemonic MSB LSB
ADD %A,[%X]+ 11001011000011961H
ADD %A,[%Y]+ 11001011000111963H
ADD %B,[%X]+ 11001011001011965H
ADD %B,[%Y]+ 11001011001111967H
Flags: EICZ
↓ – ↕↕
Mode: Src: Register indirect
Dst: Register direct
Extended addressing: Invalid
ADD [%ir],%r Add r reg. to location [ir reg.] 2 cycles
Function: [ir] ← [ir] + r
Adds the content of the r register (A or B) to the data memory addressed by the ir register (X or
Y).
Code:
Mnemonic MSB LSB
ADD [%X],%A 11001011010001968H
ADD [%X],%B 1100101101100196CH
ADD [%Y],%A 1100101101010196AH
ADD [%Y],%B 1100101101110196EH
Flags: EICZ
↓ – ↕↕
Mode: Src: Register direct
Dst: Register indirect
Extended addressing: Valid
Extended LDB %EXT,imm8
operation: ADD [%X],%r [00imm8] ← [00imm8] + r (00imm8 = 0000H + 00H to FFH)
LDB %EXT,imm8
ADD [%Y],%r [FFimm8] ← [FFimm8] + r (FFimm8 = FF00H + 00H to FFH)