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S1C63000 CORE CPU MANUAL EPSON 63
CHAPTER 4: INSTRUCTION SET
ADC [%ir],%r Add with carry r reg. to location [ir reg.] 2 cycles
Function: [ir] ← [ir] + r + C
Adds the content of the r register (A or B) and carry (C) to the data memory addressed by the ir
register (X or Y).
Code:
Mnemonic MSB LSB
ADC [%X],%A 110011110100019E8H
ADC [%X],%B 110011110110019ECH
ADC [%Y],%A 110011110101019EAH
ADC [%Y],%B 110011110111019EEH
Flags: EICZ
↓ – ↕↕
Mode: Src: Register direct
Dst: Register indirect
Extended addressing: Valid
Extended LDB %EXT,imm8
operation: ADC [%X],%r [00imm8] ← [00imm8] + r + C (00imm8 = 0000H + 00H to FFH)
LDB %EXT,imm8
ADC [%Y],%r [FFimm8] ← [FFimm8] + r + C (FFimm8 = FF00H + 00H to FFH)
ADC [%ir]+,%r Add with carry r reg. to location [ir reg.] and increment ir reg. 2 cycles
Function: [ir] ← [ir] + r + C, ir ← ir + 1
Adds the content of the r register (A or B) and carry (C) to the data memory addressed by the ir
register (X or Y). Then increments the ir register (X or Y). The flags change due to the operation
result of the data memory and the increment result of the ir register does not affect the flags.
Code:
Mnemonic MSB LSB
ADC [%X]+,%A 110011110100119E9H
ADC [%X]+,%B 110011110110119EDH
ADC [%Y]+,%A 110011110101119EBH
ADC [%Y]+,%B 110011110111119EFH
Flags: EICZ
↓ – ↕↕
Mode: Src: Register direct
Dst: Register indirect
Extended addressing: Invalid