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48 EPSON S1C63000 CORE CPU MANUAL
CHAPTER 4: INSTRUCTION SET
4.2.4 List in alphabetical order
ADC %A,%A
%A,%B
%A,imm4
%A,[%X]
%A,[%X]+
%A,[%Y]
%A,[%Y]+
%B,%A
%B,%A,n4
%B,%B
%B,imm4
%B,[%X]
%B,[%X],n4
%B,[%X]+
%B,[%X]+,n4
%B,[%Y]
%B,[%Y],n4
%B,[%Y]+
%B,[%Y]+,n4
[%X],%A
[%X],%B
[%X],%B,n4
[%X],imm4
[%X],0,n4
[%X]+,%A
[%X]+,%B
[%X]+,%B,n4
[%X]+,imm4
[%X]+,0,n4
[%Y],%A
[%Y],%B
[%Y],%B,n4
[%Y],imm4
[%Y],0,n4
[%Y]+,%A
[%Y]+,%B
[%Y]+,%B,n4
[%Y]+,imm4
[%Y]+,0,n4
ADD %A,%A
%A,%B
%A,imm4
%A,[%X]
%A,[%X]+
%A,[%Y]
%A,[%Y]+
%B,%A
%B,%B
%B,imm4
%B,[%X]
%B,[%X]+
%B,[%Y]
%B,[%Y]+
%X,%BA
%X,sign8
%Y,%BA
%Y,sign8
[%X],%A
[%X],%B
110011111000X
110011111001X
110011100i3i2i1i0
1100111100000
1100111100001
1100111100010
1100111100011
110011111010X
100001101
[ 10H-n4 ]
110011111011X
110011101i3i2i1i0
1100111100100
111011100
[ 10H-n4 ]
1100111100101
111011101
[ 10H-n4 ]
1100111100110
111011110
[ 10H-n4 ]
1100111100111
111011111
[ 10H-n4 ]
1100111101000
1100111101100
111010100
[ 10H-n4 ]
110011000i3i2i1i0
111010000
[ 10H-n4 ]
1100111101001
1100111101101
111010101
[ 10H-n4 ]
110011001i3i2i1i0
111010001
[ 10H-n4 ]
1100111101010
1100111101110
111010110
[ 10H-n4 ]
110011010i3i2i1i0
111010010
[ 10H-n4 ]
1100111101011
1100111101111
111010111
[ 10H-n4 ]
110011011i3i2i1i0
111010011
[ 10H-n4 ]
110010111000X
110010111001X
110010100i3i2i1i0
1100101100000
1100101100001
1100101100010
1100101100011
110010111010X
110010111011X
110010101i3i2i1i0
1100101100100
1100101100101
1100101100110
1100101100111
111111101000X
01100
s7 s6s5 s4s3 s2s1 s0
111111101001X
01101
s7 s6s5 s4s3 s2s1 s0
1100101101000
1100101101100
1 ↓ – ×
1 ↓ – ×
1 ↓ – ×
1 ↓ – ●
1 ↓ – ×
1 ↓ – ●
1 ↓ – ×
1 ↓ – ×
2 ↓ – ×
1 ↓ – ×
1 ↓ – ×
1 ↓ – ●
2 ↓ – ●
1 ↓ – ×
2 ↓ – ×
1 ↓ – ●
2 ↓ – ●
1 ↓ – ×
2 ↓ – ×
2 ↓ – ●
2 ↓ – ●
2 ↓ – ●
2 ↓ – ●
2 ↓ – ●
2 ↓ – ×
2 ↓ – ×
2 ↓ – ×
2 ↓ – ×
2 ↓ – ×
2 ↓ – ●
2 ↓ – ●
2 ↓ – ●
2 ↓ – ●
2 ↓ – ●
2 ↓ – ×
2 ↓ – ×
2 ↓ – ×
2 ↓ – ×
2 ↓ – ×
1 ↓ – ×
1 ↓ – ×
1 ↓ – ×
1 ↓ – ●
1 ↓ – ×
1 ↓ – ●
1 ↓ – ×
1 ↓ – ×
1 ↓ – ×
1 ↓ – ×
1 ↓ – ●
1 ↓ – ×
1 ↓ – ●
1 ↓ – ×
1 ↓ –– ×
1 ↓ –– ●
1 ↓ –– ×
1 ↓ –– ●
2 ↓ – ●
2 ↓ – ●
A ← A+A+C
A ← A+B+C
A ← A+imm4+C
A ← A+[X]+C
A ← A+[X]+C, X ← X+1
A ← A+[Y]+C
A ← A+[Y]+C, Y ← Y+1
B ← B+A+C
B ← N's adjust (B+A+C)
B ← B+B+C
B ← B+imm4+C
B ← B+[X]+C
B ← N's adjust (B+[X]+C)
B ← B+[X]+C, X ← X+1
B ← N's adjust (B+[X]+C), X ← X+1
B ← B+[Y]+C
B ← N's adjust (B+[Y]+C)
B ← B+[Y]+C, Y ← Y+1
B ← N's adjust (B+[Y]+C), Y ← Y+1
[X] ← [X]+A+C
[X] ← [X]+B+C
[X] ← N's adjust ([X]+B+C)
[X] ← [X]+imm4+C
[X] ← N's adjust ([X]+0+C)
[X] ← [X]+A+C, X ← X+1
[X] ← [X]+B+C, X ← X+1
[X] ← N's adjust ([X]+B+C), X ← X+1
[X] ← [X]+imm4+C, X ← X+1
[X] ← N's adjust ([X]+0+C), X ← X+1
[Y] ← [Y]+A+C
[Y] ← [Y]+B+C
[Y] ← N's adjust ([Y]+B+C)
[Y] ← [Y]+imm4+C
[Y] ← N's adjust ([Y]+0+C)
[Y] ← [Y]+A+C, Y ← Y+1
[Y] ← [Y]+B+C, Y ← Y+1
[Y] ← N's adjust ([Y]+B+C), Y ← Y+1
[Y] ← [Y]+imm4+C, Y ← Y+1
[Y] ← N's adjust ([Y]+0+C), Y ← Y+1
A ← A+A
A ← A+B
A ← A+imm4
A ← A+[X]
A ← A+[X], X ← X+1
A ← A+[Y]
A ← A+[Y], Y ← Y+1
B ← B+A
B ← B+B
B ← B+imm4
B ← B+[X]
B ← B+[X], X ← X+1
B ← B+[Y]
B ← B+[Y], Y ← Y+1
X ← X+BA
X ← X+sign8 (sign8=-128~127)
Y ← Y+BA
Y ← Y+sign8 (sign8=-128~127)
[X] ← [X]+A
[X] ← [X]+B
Mnemonic
Machine code
Operation Cycle Page
Flag EXT.
mode
12
EICZ
11109876543210
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