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6 EPSON S1C63000 CORE CPU MANUAL
CHAPTER 2: ARCHITECTURE
Shift/Rotate instructions that change the Z flag:
SLL, SRL, RL, RR
The Z flag is used for condition judgments when executing the conditional jump ("JRZ sign8" and
"JRNZ sign8") instructions, thus it is possible to branch processing to a routine according to the
operation result.
• C (carry) flag
The C flag is set to "1" when a carry (carry from the most significant bit) or a borrow (the most signifi-
cant bit borrows) has been generated by the execution of an arithmetic instruction and a shift/rotate
instruction, otherwise the flag is set to "0".
Arithmetic instructions that change the C flag:
ADD, ADC, SUB, SBC, CMP, INC, DEC
(It is different from the Z flag, the logic operation instructions except for the instruction that operates
the F register does not change the C flag. In addition, the ADD instructions for the X and Y register
operations and the INC and DEC instructions for the stack pointer operation does not change the C
flag.)
Shift/Rotate instructions that change the C flag:
SLL, SRL, RL, RR
The C flag is used for condition judgments when executing the conditional jump ("JRC sign8" and
"JRNC sign8") instructions, thus it is possible to branch processing to a routine according to the
operation result.
• I flag
The I flag permits and forbids the hardware interrupts except for the NMI. By setting the I flag to "1",
the CPU enters in the EI (enable interrupts) status and the hardware interrupts are enabled. When the
I flag is set to "0", the CPU is in the DI (disable interrupts) and the interrupts except for NMI are
disabled. Furthermore, when a hardware interrupt (including the NMI) is generated, the I flag is reset
to "0" and interrupts after that point are disabled. The multiple interrupts can be accepted by setting
the I flag to "1" in the interrupt processing routine.
The NMI (non-maskable interrupt) is accepted regardless of the I flag setting.
The software interrupts are accepted regardless of the I flag and do not reset the I flag.
The I flag is set to "0" (DI status) at an initial reset, therefore it is necessary to set "1" before using
interrupts by software.
See Section 3.5, "Interrupts" for details.
• E (extension mode) flag
The E flag indicates whether an extended addressing that uses the EXT (extension) register is valid or
invalid. When data is loaded into the EXT register, this flag is set to "1" and the data of the instruction
immediately after that (extended addressable instructions only) is extended with the EXT register.
Then the instruction is executed and the E flag is reset to "0".
See Section 2.1.5, "EXT register and data extension" for details.
• Flag operations
As described above, the flags are automatically set/reset by the hardware. However, it is necessary to
set by software, especially the I flag. The following instructions are provided in order to operate the F
flag.
LD %A,%F Reads all the flag data
LD %F,%A Writes all the flag data
LD %F,imm4 Writes all the flag data
AND %F,imm4 Resets flag(s)
OR %F,imm4 Sets flag(s)
XOR %F,imm4 Inverts flag(s)
PUSH %F Evacuates the F register
POP %F Returns the F register
RETI Returns the F register∗
∗ The RETI instruction is used to return from interrupt processing routines (including software
interrupts), and returns the F register data that was evacuated when the interrupt was generated.