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S1C63000 CORE CPU MANUAL EPSON 61
CHAPTER 4: INSTRUCTION SET
ADC %r,%r'
ADC %r,imm4 Add with carry immediate data imm4 to r reg. 1 cycle
Function: r ← r + imm4 + C
Adds the 4-bit immediate data imm4 and carry (C) to the r register (A or B).
Code: Mnemonic MSB LSB
ADC %A,imm4 110011100i3i2i1i019C0H–19CFH
ADC %B,imm4 110011101i3i2i1i019D0H–19DFH
Flags: EICZ
↓ – ↕↕
Mode: Src: Immediate data
Dst: Register direct
Extended addressing: Invalid
Add with carry r' reg. to r reg. 1 cycle
Function: r ← r + r' + C
Adds the content of the r' register (A or B) and carry (C) to the r register (A or B).
Code: Mnemonic MSB LSB
ADC %A,%A 110011111000X19F0H, (19F1H)
ADC %A,%B 110011111001X19F2H, (19F3H)
ADC %B,%A 110011111010X19F4H, (19F5H)
ADC %B,%B 110011111011X19F6H, (19F7H)
Flags: EICZ
↓ – ↕↕
Mode: Src: Register direct
Dst: Register direct
Extended addressing: Invalid