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112 EPSON S1C63000 CORE CPU MANUAL
CHAPTER 4: INSTRUCTION SET
OR %r,%r’
OR %r,imm4
Logical OR of r’ reg. and r reg. 1 cycle
Function: r ← r ∨ r’
Performs a logical OR operation of the content of the r’ register (A or B) and the content of the r
register (A or B), and stores the result in the r register.
Code:
Mnemonic MSB LSB
OR %A,%A 110110111000X1B70H, (1B71H)
OR %A,%B 110110111001X1B72H, (1B73H)
OR %B,%A 110110111010X1B74H, (1B75H)
OR %B,%B 110110111011X1B76H, (1B77H)
Flags: EICZ
↓ ––↕
Mode: Src: Register direct
Dst: Register direct
Extended addressing: Invalid
Logical OR of immediate data imm4 and r reg. 1 cycle
Function: r ← r ∨ imm4
Performs a logical OR operation of the 4-bit immediate data imm4 and the content of the r
register (A or B), and stores the result in the r register.
Code:
Mnemonic MSB LSB
OR %A,imm4 110110100i3i2i1i01B40H–1B4FH
OR %B,imm4 110110101i3i2i1i01B50H–1B5FH
Flags: EICZ
↓ ––↕
Mode: Src: Immediate data
Dst: Register direct
Extended addressing: Invalid