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System Control Module (SCM)
MCF52211 ColdFire® Integrated Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 12-17
At reset, these on-chip modules are configured to have only supervisor read/write access capabilities. Bit
encodings for the ACCESS_CTRL field in the GPACR are shown in Table 12-14. Table 12-15 shows the
memory space protected by the GPACRs and the modules mapped to these spaces.
Table 12-13. Grouped Peripheral Access Control Register (GPACR) Field Descriptions
Field Description
7
LOCK
This bit, after set, prevents subsequent writes to the GPACR. Any attempted write to the GPACR generates
an error termination and the contents of the register are not affected. Only a system reset clears this flag.
6–4 Reserved, should be cleared.
3–0
ACCESS_CTRL
This 4-bit field defines the access control for the given memory region.
The encodings for this field are shown in Table 12-14.
Table 12-14. GPACR ACCESS_CTRL Bit Encodings
Bits Supervisor Mode User Mode
0000 Read / Write No Access
0001 Read No Access
0010 Read Read
0011 Read No Access
0100 Read / Write Read / Write
0101 Read / Write Read
0110 Read / Write Read / Write
0111 No Access No Access
1000 Read / Write / Execute No Access
1001 Read / Execute No Access
1010 Read / Execute Read / Execute
1011 Execute No Access
1100 Read / Write / Execute Read / Write / Execute
1101 Read / Write / Execute Read / Execute
1110 Read / Write Read
1111 Read / Write / Execute Execute