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MCF52211 ColdFire® Integrated Microcontroller Reference Manual, Rev. 2
24-6 Freescale Semiconductor
24.3.2 UART Mode Register 2 (UMR2n)
The UMR2n registers control UART module configuration. UMR2n can be read or written when the mode
register pointer points to it, which occurs after any access to UMR1n. UMR2n accesses do not update the
pointer.
2
PT
Parity type. PM and PT together select parity type (PM = 0x) or determine whether a data or address character is
transmitted (PM = 11).
1–0
B/C
Bits per character. Selects the number of data bits per character to be sent. The values shown do not include start,
parity, or stop bits.
00 5 bits
01 6 bits
10 7 bits
11 8 bits
IPSBAR
Offset:
0x00_0200 (UMR20)
0x00_0240 (UMR21)
0x00_0280 (UMR22)
Access: User read/write
1
76543210
R
CM TXRTS TXCTS SB
W
Reset:00000000
1
After UMR1n is read or written, the pointer points to UMR2n
Figure 24-4. UART Mode Registers 2 (UMR2n)
Table 24-3. UMR1n Field Descriptions (continued)
Field Description
PM Parity Mode Parity Type (PT= 0) Parity Type (PT= 1)
00 With parity Even parity Odd parity
01 Force parity Low parity High parity
10 No parity N/A
11 Multidrop mode Data character Address character