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Chapter 1
Overview
I/O Subsystem
51
together 5.V +3.3 V auxilary will be on whenever AC is applied. The SIOBP FPGA is responsible for ensuring
that each voltage is stable before enabling the next voltage. The power-down sequence is the opposite of the
power-up sequence, turning off the 3.3 V voltage first and finally turning off the two 12 V supplies.