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This chapter describes the DSTni I
2
C controller. Topics include:
Features on page 11
Block Diagram on page 12
Theory of Operation on page 12
Programmer’s Reference on page 22
I
2
C Controller Register Summary on page 22
I
2
C Controller Register Definitions on page 23
Features
Master or slave operation
Multmaster operation
Software selectable acknowledge bit
Arbitration-lost interrupt with automatic mode switching from master to slave
Calling address identification interrupt with automatic mode switching from master to
slave
START and STOP signal generation/detection
Repeated START signal generation
Acknowledge bit generation/detection
Bus busy detection
100 KHz to 400 KHz operation