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Theory of Operation
USB Background
USB is a serial bus operating at 12 Mb/s. USB provides an expandable, hot-pluggable Plug-
and-Play serial interface that ensures a standard, low-cost socket for adding external peripheral
devices.
USB allows the connection of up to 127 devices. Devices suitable for USB range from simple
input devices such as keyboards, mice, and joysticks, to advanced devices such as printers,
scanners, storage devices, modems, and video-conferencing cameras.
Version 1.1 of the USB specification provides for peripheral speeds of up to 1.5 Mbps for low-
speed devices and up to 12 Mbps for full-speed devices.
USB Interrupt
The DSTni USB interrupt is located at base input/output (I/O) of 9800h. It is logically ORed with
external interrupt 3.
USB Core
The USB core has three functional blocks.
Serial Interface Engine (SIE)
Microprocessor Interface
Digital Phase-Locked Loop Logic
Serial Interface Engine
The USB Serial Interface Engine (USB SIE) has two major sections: Tx Logic and Rx Logic.
Tx Logic formats and transmits data packets that the microprocessor builds in memory. These
packets are converted from a parallel-to-serial data stream. Tx Logic performs all the necessary
USB data formatting, including:
NRZI encoding
Bit-stuff
Cyclic Redundancy Check (CRC) computation
Addition of SYNC field and EOP
The Rx Logic receives USB data and stores the packets in memory so the microprocessor can
process them. Serial USB data converts to a byte-wide parallel data stream and is stored in
system memory. The receive logic:
Decodes an NRZ USB serial data stream
Performs bit-stuff removal
Performs CRC check, PID check, and other USB protocol-layer checks