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Table 3-4. Master Receive Status Codes
Code I
2
C State Microprocessor Response Next I
2
C Action
40h Addr + W transmitted,
ACK received
7-bit address:
Clear IFLG, AAK=0
OR
Clear IFLG, AAK=1
10-bit address:
Write extended address byte to
DATA, clear IFLG
Transmit data byte, receive not ACK
Receive data byte, transmit ACK
Transmit extended address byte
48h Addr + W transmitted,
ACK not received
7-bit address:
Set STA, clear IFLG
OR
Set STP, clear IFLG
OR
Set STA & STP, clear IFLG
10-bit address:
Write extended address byte to
DATA, clear IFLG
Transmit repeated START
Transmit STOP
Transmit STOP and START
Transmit extended address byte
38h Arbitration lost Clear IFLG
OR
Set STA, clearIFLG
Return to idle
Transmit START when bus is free
68h Arbitration lost,
SLA + W received,
ACK transmitted
Clear IFLG, AAK=0
OR
Clear IFLG, AAK=1
Receive data byte, transmit not ACK
Receive data byte, transmit ACK
78h Arbitration lost,
general call addr
received, ACK
transmitted
Same as code 68h Same as code 68h
B0h Arbitration lost, SLA + R
received, ACK
transmitted
Write byte to DATA, clear IFLG,
AAK=0
OR
Write byte to DATA, clear IFLG,
AAK=1
Transmit last byte, receive ACK
Transmit data byte, receive ACK