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USB Register Summary
Table 4-7. USB Register Summary
Hex
Offset
Mnemonic Register Description Page
00 INT_STAT Bits for each interrupt source in the USB.
39
02 ERR_STAT Bits for each error source in the USB.
41
04 STAT Transaction status in the USB.
43
06 ADDR USB address that the USB decodes in
peripheral mode.
45
08 FRM_NUM Contains the 11-bit frame number.
46
0A TOKEN Performs USB transactions during host mode.
Dedicated to host mode.
47
0D /// Reserved
///
0E /// Reserved
///
0F /// Reserved
///
10 /// Reserved
///
11 ENDPT1 Endpoint control 1 bit
49
12 ENDPT2 Endpoint control 2 bit
49
13 ENDPT3 Endpoint control 3 bit
49
14 ENDPT4 Endpoint control 4 bit
49
15 ENDPT5 Endpoint control 5 bit
49
16 ENDPT6 Endpoint control 6 bit
49
17 ENDPT7 Endpoint control 7 bit
49