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18
Servicing the Interrupt
After servicing this interrupt and transmitting the second part of the address, the Status register
contains one of the codes in Table 3-5.
Table 3-5. Codes After Servicing Interrupt (Master Receive)
Code I
2
C State Microprocessor Response Next I
2
C Action
38h Arbitration lost Clear IFLG
OR
Set STA, clear IFLG
Return to idle
Transmit START when bus free
68h Arbitration lost,
SLA + W received,
ACK transmitted
Clear IFLG, AAK=0
OR
Clear IFLG, AAK=1
Receive data byte, transmit not ACK
Receive data byte, transmit ACK
78h Arbitration lost,
SLA + R received,
ACK transmitted
Write byte to DATA, Clear IFLG,
AAK=0
OR
Write byte to DATA, Clear IFLG,
AAK=1
Transmit data byte, receive ACK
Transmit data byte, receive ACK
B0h Arbitration lost Clear IFLG
OR
Set STA, clear IFLG
Return to idle
Transmit START when bus free
E0h Second Address byte +
R transmitted, ACK
received
Clear IFLG, AAK=0
OR
Clear IFLG, AAK=1
Receive data byte, transmit not ACK
Receive data byte, transmit ACK
E8h Second Address byte +
R transmitted, ACK not
received
Clear IFLG, AAK=0
OR
Clear IFLG, AAK=1
Receive data byte, transmit not ACK
Receive data byte, transmit ACK