Xilinx UG492 Switch User Manual


 
Ethernet AVB Endpoint User Guide www.xilinx.com 109
UG492 July 23, 2010
Required Constraints
INST "*top/rtc_inst/rtc_configuration_inst/reg_nanosec_offset*" TNM =
FFS "rtc_regs_sample";
INST "*top/rtc_inst/rtc_configuration_inst/reg_sec_offset*" TNM = FFS
"rtc_regs_sample";
INST "*top/rtc_inst/rtc_configuration_inst/reg_epoch_offset*" TNM =
FFS "rtc_regs_sample";
INST "*top/rtc_inst/rtc_configuration_inst/reg_rtc_increment*" TNM =
FFS "rtc_regs_sample";
INST "*top/rtc_inst/rtc_configuration_inst/reg_offset_8k*" TNM = FFS
"rtc_regs_sample";
TIMESPEC "ts_rtc_regs_sample" = FROM "cpu_bus" TO "rtc_regs_sample" 24
ns DATAPATHONLY;
INST "*top/rtc_inst/rtc_configuration_inst/rd_data_result*" TNM = FFS
"rtc_rd_data";
INST "*top/rtc_inst/rtc_configuration_inst/cpu_rd_data*" TNM = FFS
"rtc_cpu_rd_data";
TIMESPEC "ts_rtc_rd_data" = FROM "rtc_rd_data" TO "rtc_cpu_rd_data" 16
ns DATAPATHONLY;
INST "*top/rtc_inst/rtc_configuration_inst/pulse1div128sec_toggle" TNM
= FFS "pulse1div128sec_toggle";
INST
"*top/rtc_inst/rtc_configuration_inst/resync_set_toggle/data_sync"
TNM = FFS "resync_set_toggle";
TIMESPEC "ts_pulse1div128sec_toggle" = FROM "pulse1div128sec_toggle" TO
"resync_set_toggle" 8 ns DATAPATHONLY;
# clock domain crossing constraints for MAC Host I/F Logic
#---------------------------------------------------------
INST "*top*generic_host_if_inst/wr_toggle" TNM = FFS "wr_toggle";
INST "*top*generic_host_if_inst/resync_write_toggle/data_sync" TNM =
FFS "resync_write_toggle";
TIMESPEC "ts_wr_toggle" = FROM "wr_toggle" TO "resync_write_toggle" 8
ns DATAPATHONLY;
INST "*top*generic_host_if_inst/rd_toggle" TNM = FFS "rd_toggle";
INST "*top*generic_host_if_inst/resync_read_toggle/data_sync" TNM =
FFS "resync_read_toggle";
TIMESPEC "ts_rd_toggle" = FROM "rd_toggle" TO "resync_read_toggle" 8
ns DATAPATHONLY;
INST "*top/include_plb.plb_intf_inst/Bus2IP_Addr*" TNM = FFS
"cpu_bus";
INST "*top/include_plb.plb_intf_inst/Bus2IP_Data*" TNM = FFS "cpu_bus";
INST "*top/include_plb.plb_intf_inst/Bus2IP_BE*" TNM = FFS "cpu_bus";
INST "*top*generic_host_if_inst/host_address_bit10" TNM = FFS
"host_sample";
INST "*top*generic_host_if_inst/host_address*" TNM = FFS "host_sample";
INST "*top*generic_host_if_inst/stats_upper_word*" TNM = FFS
"host_sample";
INST "*top*generic_host_if_inst/host_wr_data*" TNM = FFS "host_sample";
INST "*top*generic_host_if_inst/host_be*" TNM = FFS "host_sample";
TIMESPEC "ts_host_sample" = FROM "cpu_bus" TO "host_sample" 8 ns
DATAPATHONLY;