Xilinx UG492 Switch User Manual


 
72 www.xilinx.com Ethernet AVB Endpoint User Guide
UG492 July 23, 2010
Chapter 7: Ethernet AVB Endpoint Reception
VLAN Priority Match
The example illustrated in Figure 7-6 shows a single MAC Header Filter (one of the eight
provided) configured to filter on frames containing a VLAN tag with a VLAN Priority
value of 1.
Any Other Combinations
Because the Match Pattern Register and Match Enable Register provide the ability to filter
across any bitwise match/don’t-care pattern of the initial 128-bits of an Ethernet frame,
match combinations of Destination Address, Length/Type Field (when no VLAN tag is
present), VLAN fields (when present) can be selected with complete flexibility.
X-Ref Target - Figure 7-6
Figure 7-6: Filtering of VLAN Frames with a Specific Priority Value
rx_clk
legacy_rx_data[7:0]
legacy_rx_data_valid
rx_clk_enable
DA SA DATAL/T
VLAN
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0xFF
0xFF
0xE0
0x00
Don’t-cares
Match Pattern Register
Match Enable Register
0x81
0x00
0x20
VLAN
priority
filter