Xilinx UG492 Switch User Manual


 
38 www.xilinx.com Ethernet AVB Endpoint User Guide
UG492 July 23, 2010
Chapter 4: Generating the Core
Parameter Values in the XCO File
XCO file parameter names and their values are identical to the names and values shown in
the GUI.
Table 4-1 shows the XCO file parameters and values and summarizes the GUI defaults.
The following is an example of the CSET parameters in an XCO file:
CSET component_name=eth_avb_endpoint_v2_4
CSET number_of_plb_masters=2
CSET plb_base_address=00000000
Output Generation
The output files generated by the CORE Generator software are placed in the project
directory. The list of output files includes the following items.
The netlist file for the core
Supporting CORE Generator software files
Release notes and documentation
Subdirectories containing an HDL example design
Scripts to run the core through the back-end tools and to simulate the core using
Mentor Graphics ModelSim v6.5c, Cadence Incisive Enterprise Simulator (IES) v9.2,
and Synopsys VCS and VCS MX 2009.12
See the following chapters for a complete description of the CORE Generator software
output files and for detailed information about the HDL example design.
Chapter 14, “Quick Start Example Design”
Chapter 15, “Detailed Example Design (Standard Format)”
Chapter 16, “Detailed Example Design (EDK format)”
Table 4-1: XCO File Values and Default Values
Parameter XCO File Values Default GUI Setting
component_name ASCII text starting with a letter and
based on the following character
set: a..z, 0..9 and _
eth_avb_endpoint_v2_4
generate_as_edk_pcore Select between true and false false
number_of_plb_masters Select from the range: 1 to 16 2
plb_base_address Select from the range: 0x00000000
to 0xFFFF8000
0x00000000