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Debug Module
MCF52211 ColdFire® Integrated Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 28-11
setting of the trigger definition register (TDR). AATR is accessible in supervisor mode as debug control
register 0x06 using the WDEBUG instruction and through the BDM port using the WDMREG command.
DRc[4:0]: 0x06 (AATR) Access: Supervisor write-only
BDM write-only
1514131211109876543210
R
W RM SZM TTM TMM R SZ TT TM
Reset0000000000000101
Figure 28-5. Address Attribute Trigger Register (AATR)
Table 28-8. AATR Field Descriptions
Field Description
15
RM
Read/write Mask. Setting RM masks R in address comparisons.
14–13
SZM
Size Mask. Setting an SZM bit masks the corresponding SZ bit in address comparisons.
12–11
TTM
Transfer Type Mask. Setting a TTM bit masks the corresponding TT bit in address comparisons.
10–8
TMM
Transfer Modifier Mask. Setting a TMM bit masks the corresponding TM bit in address comparisons.
7
R
Read/Write. R is compared with the R/W
signal of the processor’s local bus.
6–5
SZ
Size. Compared to the processor’s local bus size signals.
00 Longword
01 Byte
10 Word
11 Reserved