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CHAPTER 2 DEPENDENCE FUNCTIONS
2.1.5 Interrupt Simulation
This section describes the interrupt simulation executed by SOFTUNE Workbench.
■ Interrupt Simulation
Simulate the operation of the MCU (including intelligent I/O service
*
) in response to an interrupt request.
Note that intelligent I/O service does not support any end request from the resource.
Provisions for the causes of interrupts and interrupt control registers are made by referencing data in the
install file read at simulator start up.
*: Automatic data transfer function between I/O and memory is called an intelligent I/O service. This
function allows exchange of data between memory and I/O, which was done previously by the interrupt
handling program, using DMA (Direct Memory Access). (For details, refer to the user manual for each
model.)
The methods of generating interrupts are as follows:
- Execute instructions for the specified number of cycles while the program is running (during execution
of executable commands) to generate interrupts corresponding to the specified interrupt numbers and
cancel the interrupt generating conditions.
- Continue to generate interrupts each time the number of instruction execution cycles exceeds the
specified number of cycles.
The method of generating interrupts is set by the [Setup]-[Debug environment]-[Interrupt] menu. If interrupts
are masked by the interrupt enable flag when the interrupt generating conditions are established, the
interrupts are generated after they are unmasked.
MCU operation in response to an interrupt request is also supported for the following exception handling:
- Execution of undefined instructions
- Address error in program access
(Program access to internal RAM area and internal I/O area)
- Stack area error (only for F
2
MC-16F)
Note:
When an external interrupt is generated while under an interrupt mask at high-speed simulator
debugger, that interrupt factor is eliminated.