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EM78P259N/260N
8-Bit Microprocessor with OTP ROM
Product Specification (V1.2) 05.18.2007
• 7
(This specification is subject to change without further notice)
6.1.3.1 Data Memory Configuration
Address R PAGE registers IOCX0 PAGE registers
00
R0
(Indirect Addressing Register)
Reserve
01
R1
(Time Clock Counter)
CONT
(Control Register)
02
R2
(Program Counter)
Reserve
03
R3
(Status Register)
Reserve
04
R4
(RAM Select Register)
Reserve
05
R5
(Port 5)
IOC50
(I/O Port Control Register)
06
R6
(Port 6)
IOC60
(I/O Port Control Register)
07
R7
(Port 7)
IOC70
(I/O Port Control Register)
08
(ADC Input Select Register
09
0A
0B
IOCB0
(Pull-down Control
Register)
0C
0D
0E
0F
IOCF0
(Interrupt Mask Register 1)
10
︰
1F
General Registers
20
：
3F
Bank 0 Bank 1
IOCX1 PAGE registers
IOC80
(Comparator and TCCA
Control Register)
IOC90
(TCCB and TCCC
Control Register)
IOCA0
(IR and TCCC Scale
Control Register)
IOCC0
(Open-drain Control
Register)
IOCD0
(Pull-high Control Register)
IOCE0
(WDT Control Register and
Interrupt Mask Register 2)
IOC51
(TCCA Counter)
IOC61
(TCCB LSB Counter)
IOC71
(TCCB HSB Counter)
IOC81
(TCCC Counter)
IOC91
(Low Time Register)
IOCA1
(High Time Register)
IOCB1
(High Time and Low Time
Scale control Register)
Reserve
Reserve
Reserve
Reserve
Reserve
Reserve
Reserve
Reserve
(ADC Control Register)
(ADC Offset Calibration
Register)
(The converted value
AD11~AD4 of ADC)
(The converted value
AD11~AD8 of ADC)
(The converted value
AD7~AD0 of ADC)
(Interrupt Status 2 and
Wake-up Control Register
(Interrupt Status Register 1)
R9
RA
RD
RE
RF
RB
RC
R8
IOCC1
(TCC Prescaler Control)