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EM78P259N/260N
8-Bit Microprocessor with OTP ROM
32 •
Product Specification (V1.2) 05.18.2007
(This specification is subject to change without further notice)
All I/O port pins are configured as input mode (high-impedance state)
The Watchdog Timer and prescaler are cleared
When power is switched on, the upper 3 bits of R3 is cleared
The IOCB0 register bits are set to all "1"
The IOCC0 register bits are set to all "1"
The IOCD0 register bits are set to all "1"
Bits 7, 5, and 4 of IOCE0 register is cleared
Bit 5 and 4 of RE register is cleared
RF and IOCF0 registers are cleared
Executing the “SLEP” instruction will assert the sleep (power down) mode. While
entering into sleep mode, the Oscillator, TCC, TCCA, TCCB, and TCCC are stopped.
The WDT (if enabled) is cleared but keeps on running.
During AD conversion, when “SLEP” instruction I set; the Oscillator, TCC, TCCA,
TCCB, and TCCC keep on running. The WDT (if enabled) is cleared but keeps on
running.
The controller can be awakened by:
Case 1 External reset input on /RESET pin
Case 2 WDT time-out (if enabled)
Case 3 Port 5 input status changes (if ICWE is enabled)
Case 4 Comparator output status changes (if CMPWE is enabled)
Case 5 AD conversion completed (if ADWE enable)
The first two cases (1 & 2) will cause the EM78P260N to reset. The T and P flags of R3
can be used to determine the source of the reset (wake-up). Cases 3, 4, & 5 are
considered the continuation of program execution and the global interrupt ("ENI" or
"DISI" being executed) decides whether or not the controller branches to the interrupt
vector following wake-up. If ENI is executed before SLEP, the instruction will begin to
execute from address 0x06 (Case 3), 0x0F (Case 4), and 0x0C (Case 5) after wake-up.
If DISI is executed before SLEP, the execution will restart from the instruction next to
SLEP after wake-up.
Only one of Cases 2 to 5 can be enabled before entering into sleep mode. That is:
Case [a] If WDT is enabled before SLEP, all of the RE bit is disabled. Hence, the
EM78P259N/260N can be awakened only with Case 1 or Case 2. Refer to
the section on Interrupt (Section 6.6 below) for further details.
Case [b] If Port 5 Input Status Change is used to wake -up EM78P259N/260N and the
ICWE bit of RE register is enabled before SLEP, WDT must be disabled.
Hence, the EM78P259N/260N can be awakened only with Case 3. Wake-up
time is dependent on oscillator mode. In RC mode, Wake-up time is 32
clocks (for stable oscillators). In High Crystal mode, Wake-up time is 2ms
and 32clocks (for stable oscillators); and in low Crystal mode, Wake-up time
is 500ms.