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EM78P259N/260N
8-Bit Microprocessor with OTP ROM
Product Specification (V1.2) 05.18.2007
• 31
(This specification is subject to change without further notice)
6.4.1 Usage of Port 5 Input Change Wake-up/Interrupt Function
(1) Wake-up (2) Wake-up and Interrupt
(a) Before Sleep (a) Before Sleep
1. Disable WDT 1. Disable WDT
2. Read I/O Port 5 (MOV R5,R5) 2. Read I/O Port 5 (MOV R5,R5)
3. Execute "ENI" or "DISI" 3. Execute "ENI" or "DISI"
4. Enable wake-up bit (Set RE ICWE =1) 4. Enable wake-up bit (Set RE ICWE =1)
5. Execute "SLEP" instruction 5. Enable interrupt (Set IOCF0 ICIE =1)
(b) After wake-up 6. Execute "SLEP" instruction
→ Next instruction (b) After wake-up
1. IF "ENI" → Interrupt vector (006H)
2. IF "DISI" → Next instruction
(3) Interrupt
(a) Before Port 5 pin change
1. Read I/O Port 5 (MOV R5,R5)
2. Execute "ENI" or "DISI"
3. Enable interrupt (Set IOCF0 ICIE =1)
(b) After Port 5 pin changed (interrupt)
1. IF "ENI" → Interrupt vector (006H)
2. IF "DISI" → Next instruction
6.5 Reset and Wake-up
6.5.1 Reset and Wake-up Operation
A reset is initiated by one of the following events:
1. Power-on reset
2. /RESET pin input "low"
3. WDT time-out (if enabled).
The device is kept under reset condition for a period of approximately 18ms
3
(except in
LXT mode) after the reset is detected. When in LXT mode, the reset time is 500ms.
Two choices (18ms
3
or 4.5ms
4
) are available for WDT-time out period. Once a reset
occurs, the following functions are performed (the initial Address is 000h):
The oscillator continues running, or will be started (if in sleep mode)
The Program Counter (R2) is set to all "0"
3
VDD=5V, WDT Time-out period = 16.5ms ± 30%.
VDD=3V, WDT Time-out period = 18ms ± 30%.
4
VDD=5V, WDT Time-out period = 4.2ms ± 30%.
VDD=3V, WDT Time-out period = 4.5ms ± 30%.