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EM78P259N/260N
8-Bit Microprocessor with OTP ROM
16 •
Product Specification (V1.2) 05.18.2007
(This specification is subject to change without further notice)
Bit 2 ~ Bit 0 (PST2 ~ PST0): TCC prescaler bits
PST2 PST1 PST0 TCC Rate
0 0 0 1:2
0 0 1 1:4
0 1 0 1:8
0 1 1 1:16
1 0 0 1:32
1 0 1 1:64
1 1 0 1:128
1 1 1 1:256
Note: Tcc time-out period [1/Fosc x prescaler x 256 (Tcc cnt) x 1 (CLK=2)]
Tcc time-out period [1/Fosc x prescaler x 256 (Tcc cnt) x 2 (CLK=4)]
6.2.3 IOC50 ~ IOC70 (I/O Port Control Register)
"1" puts the relative I/O pin into high impedance, while "0" defines the relative I/O
pin as output.
Only the lower 6 bits of IOC50 can be defined (this applies to EM78P259N only,
since EM78P260N can use all the bits).
Only the lower 1 bit of IOC70 can be defined, the other bits are not available.
IOC50, IOC60, and IOC70 registers are all readable and writable
6.2.4 IOC80 (Comparator and TCCA Control Register)
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
– – CMPOUT COS1 COS0 TCCAEN TCCATS TCCATE
Note: Bits 4~0 of the IOC80 register are both readable and writable
Bit 5 of the IOC80 register is read only.
Bit 7 & Bit 6: Not used
Bit 5 (CMPOUT): Result of the comparator output
This bit is read only.
Bit 4 & Bit 3 (COS1 & COS0): Comparator/OP Select bits
COS1 COS0 Function Description
0 0
Comparator and OP are not used. P64, P65, and P66 function as
normal I/O pins.
0 1 Acts as Comparator and P64 functions as normal I/O pin
1 0 Acts as Comparator and P64 functions as Comparator output pin (CO)
1 1 Acts as OP and P64 functions as OP output pin (CO)
Bit 2 (TCCAEN): TCCA enable bit
0 = disable TCCA
1 = enable TCCA as a counter