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EM78P259N/260N
8-Bit Microprocessor with OTP ROM
36 •
Product Specification (V1.2) 05.18.2007
(This specification is subject to change without further notice)
6.5.1.2 Register Initial Values after Reset
The following summarizes the initialized values for registers.
Address Name Reset Type Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Bit Name C57 C56 C55 C54 C53 C52 C51 C50
Type
259
N
260
N
259
N
260
N
– – – – – –
Power-on 0 1 0 1 1 1 1 1 1 1
/RESET and WDT 0 1 0 1 1 1 1 1 1 1
N/A IOC50
Wake-up from Pin
Change
0 P 0 P P P P P P P
Bit Name C67 C66 C65 C64 C63 C62 C61 C60
Power-on 1 1 1 1 1 1 1 1
/RESET and WDT 1 1 1 1 1 1 1 1
N/A IOC60
Wake-up from Pin
Change
P P P P P P P P
Bit Name X X X X X X X C70
Power-on 0 0 0 0 0 0 0 1
/RESET and WDT 0 0 0 0 0 0 0 1
N/A IOC70
Wake-up from Pin
Change
P P P P P P P P
Bit Name X X CMPOUT COS1 COS0 TCCAEN TCCATS TCCATE
Power-on 0 0 0 0 0 0 0 0
/RESET and WDT 0 0 0 0 0 0 0 0
N/A IOC80
Wake-up from Pin
Change
P P P P P P P P
Bit Name TCCBHE TCCBEN TCCBTS TCCBTE X TCCCEN TCCCTS TCCCTE
Power-on 0 0 0 0 0 0 0 0
/RESET and WDT 0 0 0 0 0 0 0 0
N/A IOC90
Wake-up from Pin
Change
P P P P P P P P
Bit Name TCCCSE TCCCS2 TCCCS1 TCCCS0 IRE HF LGP IROUTE
Power-On 0 0 0 0 0 0 0 0
/RESET and WDT 0 0 0 0 0 0 0 0
N/A
IOCA0
(IR CR)
Wake-up from Pin
Change
P P P P P P P P
Bit Name /PD57 /PD56 /PD55 /PD54 /PD53 /PD52 /PD51 /PD50
Power-on 1 1 1 1 1 1 1 1
/RESET and WDT 1 1 1 1 1 1 1 1
N/A
IOCB0
(PDCR)
Wake-up from Pin
Change
P P P P P P P P
Bit Name /OD67 /OD66 /OD65 /OD64 /OD63 /OD62 /OD61 /OD60
Power-on 1 1 1 1 1 1 1 1
/RESET and WDT 1 1 1 1 1 1 1 1
N/A
IOCC0
(ODCR)
Wake-up from Pin
Change
P P P P P P P P