Filter
Top Products
EM78P259N/260N
8-Bit Microprocessor with OTP ROM
Product Specification (V1.2) 05.18.2007
• 57
(This specification is subject to change without further notice)
Under TCCBH / MSB Counter (IOC71):
TCCBH/MSB (IOC71) is an 8-bit clock counter is for the most significant byte of
TCCBX (TCCBH). It can be read, written to, and cleared on any reset
condition.
When TCCBHE (IOC90) is “0,” then TCCBH is disabled. When TCCBHE is”1,”
then TCCB is a 16-bit length counter.
NOTE
When TCCBH is Disabled:
TCCB time-out period [1/Fosc x ( 256 - TCCB cnt ) x 1(CLK=2)]
TCCB time-out period [1/Fosc x ( 256 - TCCB cnt ) x 2(CLK=4)]
When TCCBH is Enabled:
TCCB time-out period {1/Fosc x [ 65536 - (TCCBH * 256 + TCCB cnt)] x 1(CLK=2)}
TCCB time-out period {1/Fosc x [ 65536 - (TCCBH * 256 + TCCB cnt)] x 2(CLK=4)}
Under TCCC Counter (IOC81):
IOC81 (TCCC) is an 8-bit clock counter. It can be read, written, and cleared on
any reset condition.
If HF (Bit 2 of IOCA0) = 1 and IRE (Bit 3 of IOCA0) = 1, TCCC counter scale
uses the low time segments of the pulse generated by Fcarrier frequency
modulation (see Fig. 6-12 in Section 6.8.2, Function Description). Then the
TCCC value will be the TCCC predicted value.
When HF = 0 or IRE = 0, the TCCC is an Up Counter.
NOTE
In TCCC Up Counter mode:
■ TCCC timeout period [1/Fosc x scaler (IOCA0) x (256-TCCC cnt) x 1(CLK=2)]
■ TCCC timeout period [1/Fosc x scaler (IOCA0) x (256-TCCC cnt) x 2(CLK=4)]
When HF = 1 and IRE = 1, the TCCC counter scale uses the low time
segments of the pulse generated by Fcarrier frequency modulation.
NOTE
In IR mode:
■ Fcarrier = FT/ 2 { [1+decimal TCCC Counter value (IOC81)] * TCCC Scale (IOCA0) }
■ FT is system clock: FT = Fosc/1 (CLK=2)
FT = Fosc/2 (CLK=4)