Intel 82558 Switch User Manual


 
Intel 8255x 10/100 Mbps Ethernet Controller Family Open Source Software Developer Manual 115
Host Software Interface
6.6.3 Priority Aware Frame Based Flow Control
The 82558 and later generation controllers have the ability to respond to priority aware frame
based flow control frames. Their operation relates to multiple queues.
6.6.3.1 Priority Flow Control Operation
The 82558 and later generation controllers can receive two types of flow control frames:
Pause. The normal IEEE pause frames that stop all transmission (as discussed above).
Pause Low. This is a new low priority pause frame that stops only the low priority queue
(LPQ).
When the device receives a pause frame, it stops all transmission at the CSMA level as defined in
IEEE draft standard 802.3x.
When the controller receives a pause low frame, it stops transmitting the LPQ at the micromachine
level. When a pause low flow control frame is received, the device continues to transmit all frames
in its transmit FIFO. When the device is used with priority aware FC it is recommended that the
two frames in FIFO configuration bit is set so that the number of frames is no more than two.
Note: The 82558 and 82559 do not transmit pause low frames.
When the device receives a flow control frame (either a pause frame or a pause low frame), this
frame overrides any flow control frame previously received. If the device was paused due to a
pause frame and it receives a pause low frame, it starts transmitting high priority frames (and any
low priority packets that were in the transmit FIFO). If the device was paused low due to a pause
low frame and it receives a pause frame, it stops transmitting high priority frames immediately.
The pause and pause low frames do not affect the device’s CU state (as reflected in the CUS field
in the SCB).
6.6.3.2 Flow Control Frame Format
The pause and pause low flow control frames share the same frame format. Table 57 on page 112
illustrates a flow control frame.
Table 58. Flow Control Configuration Bits
Name
Configuration Byte
Map Location
Description Default
Transmit FC Byte 19, bit 2 IEEE frame based transmit flow control. 0 (on)
Receive FC
ReStart
Byte 19, bit 4 IEEE frame based receive flow control - ReStart mode. 0 (off)
Receive FC
ReStop
Byte 19, bit 3 IEEE frame based receive flow control - ReStop mode. 0 (off)
Reject FC Byte 19, bit 5
When this bit is set, FC frames will not be passed to
the receive FIFO like regular frames.
0 (off)
FC Delay
Byte 16, bits 7:0 (LSB)
Byte 17, bits 7:0 (MSB)
This is the slot time delay number used for the time
parameter in the assembly of pause frames (for
pausing the other node transmissions).
4000h