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vi Intel 8255x 10/100 Mbps Ethernet Controller Family Open Source Software Developer Manual
Contents
20 Transmit Buffer Descriptor..........................................................................................................85
21 Load Microcode Command Format ............................................................................................90
22 Dump Command Format ............................................................................................................ 91
23 Diagnose Command Format ...................................................................................................... 97
24 Simplified Memory Structure ....................................................................................................100
25 Receive Frame Descriptor Format ...........................................................................................100
26 Management Frame Structure.................................................................................................. 118
27 Command Block Structure........................................................................................................146
Tables
1 PCI Configuration Space ............................................................................................................ 11
2 Device and Revision ID .............................................................................................................. 13
3 Base Address Register Summary ..............................................................................................16
4 Power Management Capabilities................................................................................................18
5 Power Management Control/Status Register ............................................................................. 20
6 Power Consumption / Dissipation Reporting .............................................................................. 21
7 Generated PCI Commands ........................................................................................................22
8 Reset Commands.......................................................................................................................29
9 Device Addressing Formats .......................................................................................................30
10 Alignment Requirements for 8255x Data Structures .................................................................. 31
11 Control / Status Register ............................................................................................................ 32
12 System Control Block .................................................................................................................34
13 SCB Status Word Bits Descriptions............................................................................................35
14 SCB Command Word Bits Descriptions ..................................................................................... 37
15 SCB General Pointer for the CU Command ............................................................................... 39
16 SCB General Pointer for the RU Command ............................................................................... 40
17 Statistical Counters.....................................................................................................................40
18 Port Register Location ................................................................................................................43
19 Port Selection Function .............................................................................................................. 43
20 Dump Wake-up Data Structure ..................................................................................................45
21 EEPROM Control Register Locations......................................................................................... 46
22 EEPROM Control Register Bits Definitions ................................................................................ 46
23 EEPROM Opcode Summary (64-register EEPROM).................................................................47
24 MDI Control Register Location ...................................................................................................49
25 Management Data Pins ..............................................................................................................50
26 MDI Control Register Bits ........................................................................................................... 50
27 Receive Byte Count Register Location.......................................................................................52
28 Early Receive Interrupt Register Location .................................................................................. 52
29 Flow Control Registers Location................................................................................................. 53
30 Flow Control Threshold Values ..................................................................................................54
31 Power Management Driver Register Location............................................................................55
32 Power Management Driver Register .......................................................................................... 55
33 General Control Register Location .............................................................................................56
34 General Control Register............................................................................................................ 56
35 General Status Register Location...............................................................................................56
36 General Status Register .............................................................................................................57
37 Operation Codes ........................................................................................................................ 57
38 82557 Configuration Byte Map ...................................................................................................62
39 82558 Configuration Byte Map ...................................................................................................64