Intel 82558 Switch User Manual


 
10/100 Mbps Ethernet Controller Family Open Source Software Developer Manual 159
82550 and 82551QM Specific Information
B.2.2 IPCB Field Assignment
The mode bits in the IP Activation field control the checksum operation of the transmit command.
IPv4 Checksum (1bit). When this bit is set to 1, the device is forced to perform checksum
operation using the IPv4 header and option fields (when present) prior to transmission. This
mode can be used with any frame and when the TCP/UDP checksum, Large Send, VLAN,
Hardware Parsing, or Scheduling modes are used.
Note: The stack can command the driver to compute a checksum or not on a frame by
frame basis (or specific to the IP or TCP/UDP fields). As a result, the driver may
command the hardware not to perform the checksum operation for an IP header.
This would be the case when a frame is not a native TCP/UDP/IPv4 frame.
TCP/UDP Checksum (1bit). When this bit is set to 1, the controller is forced to perform TCP
checksum operations (including option fields when present) or UDP checksum operations,
based on the TCP/UDP parameter defined prior to transmission. This mode can be used with
any frame and when IPv4 checksum, Large Send, VLAN, Hardware Parsing, or Scheduling.
Note: The stack can command the driver to compute the checksum or not on a frame by
frame basis (or specific to IP or TCP/UDP fields). As a result, the driver may
command the hardware not to perform the checksum operation for a TCP/UDP
frame. This would be the case where the frame is not a native TCP/UDP/IPv4
frame.
Hardware Parsing (1 bit). When this bit is set to 1, the controller is forced to use its internal
transmit parser (autonomous mode is set). The internal transmit parser generates the IP header
offset and TCP/UDP header offset for internal consumption by the device blocks. In
autonomous mode, the IP header offset, TCP/UDP number and TCP/UDP header offset
parameters are ignored. When the Hardware Parsing bit is clear (semi-autonomous mode), the
controller uses the IP header offset and TCP/UDP header offset parameters to locate the IPv4
header and TCP/UDP header offsets in the transmit data stream. These are fetched from host
memory. Hardware Parsing mode can be used when the IPv4 checksum, TCP/UDP checksum,
VLAN, Scheduling, or Large Send bit is set. The Hardware Parsing bit must be cleared when
the Security bit is set.
B.2.2.1 Parameters
TCP/UDP Number (1bit). This parameter is used to denote the frame type for the checksum
operation when the TCP/UDP checksum mode is set. When this bit is set, the TCP checksum
is performed, and when it is clear, UDP checksum is performed. This parameter is relevant if
the Hardware Parsing bit is clear and the TCP/UDP checksum is set. It is also used to select the
location of the checksum field.
IP Header Offset (8 bits). This parameter denotes the offset from the first byte of the
destination address (DA) field, which is read by the controller from host memory, to the first
byte of the IPv4 header. The 82550 reads this parameter when the Hardware Parsing bit is
clear and the IPv4 checksum set.
Note: VLAN mode will not impact this number since the 4 VLAN bytes are not included
in the count since they are inserted by hardware.
TCP/UDP Header Offset (8 bits). This parameter denotes the offset from the first byte of the
destination address (DA) field, which is read by the network device from host memory, to the